For example, loads such as various kinds of lamps, motors etc. mounted on a vehicle are coupled to a battery (power source) via semiconductor elements, whereby the operations of the loads are controlled by switching the on/off states of the corresponding semiconductor elements, respectively. An overcurrent may flow into a load circuit configured by such the battery, semiconductor elements and loads due to a trouble or an operational failure etc. of the load circuit or various kinds of circuits coupled to the load circuit. When the overcurrent flows, there arises a problem that the semiconductor elements are overheated and harness wires coupling between the loads and the power source are also overheated. Thus, various kinds of overcurrent protection apparatuses have been proposed each of which is arranged to immediately detect an overcurrent when the overcurrent is generated to thereby interrupt a current flowing into a load circuit.
FIG. 2 is a circuit diagram showing the configuration of a load circuit provided with an overcurrent protection apparatus of the related art (see a patent document 1). As shown in FIG. 2, the load circuit includes a series circuit formed by a battery VB, a MOSFET (T101) as a semiconductor element, a load RL such as a lamp or a motor. The gate of the MOSFET (T101) is coupled to a driver circuit 101 via a resistor R110. Thus, the MOSFET (T101) is turned on and off in response to a drive signal output from the driver circuit 101 to thereby switch the load RL between a driving state and a stop state.
The drain of the MOSFET (T101) is coupled to a ground via a series circuit of resistors R104 and R105 and also coupled to the ground via a series circuit of a resistor R101, a transistor T102 and a resistor R103. A coupling point between the transistor T102 and the resistor R101 is coupled to the inverting input terminal of an amplifier AMP101 and the non-inverting input terminal of an amplifier AMP101 is coupled to the source of the MOSFET (T101). Further, the output terminal of the amplifier AMP101 is coupled to the gate of the transistor T102.
A coupling point (voltage V3) between the transistor (T102) and the resistor R103 is coupled to the inverting input terminal of a comparator CMP101 and a coupling point (voltage V4) between the resistors R104 and R105 is coupled to the non-inverting input terminal of the comparator CMP 101.
When the MOSFET (T101) is turned on and a current ID flows into the load circuit, a current I1 flows into the series circuit of the resistor R101, transistor T102 and resistor R103. In this case, the amplifier AMP101 controls the current I1 flowing into the transistor T102 so that the drain-source voltage Vds of the MOSFET (T101) becomes same as a voltage generated across the both ends of the resistor R101.
Thus, the voltage V3 generated at the resistor R103 becomes a value obtained by multiplying the voltage Vds by m (m=R103/R101). The amplified voltage V3 is input to the inverting input terminal of the comparator CMP101. The voltage V4 obtained by dividing a voltage V1 by the resistors R104 and R105 is input to the non-inverting input terminal of the comparator CMP101 as an overcurrent determination voltage. When the load current ID becomes an overcurrent state, the voltage Vds becomes large and so the voltage V3 becomes larger than the voltage V4. Thus, since the output state of the comparator CMP101 is inverted, the overcurrent state is detected.
Supposing that the drain voltage of the MOSFET (T101) is V1, the source voltage thereof is V2 and the on-resistance thereof is Ron, the voltage Vds is represented by the following expression (1).Vds=V1−V2=Ron*ID  (1)
The voltage Vds is amplified by an amplifier circuit configured by the resistors R101, R103, the transistor T102 and the amplifier AMP101. There is an offset voltage in the amplifier AMP101. The detection error of the overcurrent arises due to this offset voltage. Hereinafter, this detection error will be examined in the case where the amplifier AMP101 has the offset voltage ±Voff. In FIG. 2, the amplifier AMP101 is shown within a frame of an alternate long and short dash line and the offset voltage ±Voff is shown separately from the symbol of the operational amplifier. Thus, the operational amplifier represented by a triangle is an ideal operational amplifier having an offset voltage of zero volt.
Thus, the magnitude of the current I1 flowing through a path from the power source VB to the ground GND via the resistor R101, transistor T102 and resistor R103 becomes a current value which is determined as a result that the voltage Va and the voltage V2 are always controlled to be the same to each other by the amplifier AMP 101 and the transistor T102.
Supposing that the offset voltage of the amplifier AMP101 is ±Voff, the following expression is obtained.Vds±Voff=R101*I1  (2)
Supposing that the voltage drop V3 of the resistor R103 becomes a value obtained by amplifying the voltage Vds and m is R103/R101, the voltage V3 is represented by the following expression (3).
                                                                        V                ⁢                                                                  ⁢                3                            =                              R                ⁢                                                                  ⁢                103                *                I                ⁢                                                                  ⁢                1                                                                                        =                              R                ⁢                                                                  ⁢                                  103                  /                  R                                ⁢                                                                  ⁢                101                *                R                ⁢                                                                  ⁢                101                *                I                ⁢                                                                  ⁢                1                                                                                        =                              R                ⁢                                                                  ⁢                                  103                  /                  R                                ⁢                                                                  ⁢                101                *                                  (                                      Vds                    ±                    Voff                                    )                                                                                                        =                              m                *                                  (                                                            Ron                      *                      ID                                        ±                    Voff                                    )                                                                                        (        3        )            
As understood from the expression (3), a voltage obtained by multiplying the offset voltage (±Voff) by m is contained in the voltage V3, which results in the cause of variance.
The amplified voltage V3 is input to the inverting input terminal of the comparator CMP101 and the voltage V4 obtained by dividing the voltage V1 by the resistors R104 and R105 is input to the non-inverting input terminal of the comparator CMP101 as the over current determination voltage. When the current ID flowing into the load RL becomes the overcurrent state, the voltage Vds becomes large and so the voltage V3 becomes larger than the voltage V4. Thus, since the output signal of the comparator CMP101 is inverted, the overcurrent state is detected. Supposing that a value of the current ID detected as the overcurrent is I ovc, the following expression (4) is obtained.V3=m*(Ron*Iovc±Voff)=V4Iovc=V4/m/Ron±Voff/Ron  (4)
When the amplifier AMP101 does not have the offset voltage, the current I ovc becomes a constant value determined by V4, R101, R103 and Ron. In contrast, when the amplifier AMP101 has the offset voltage (±Voff), the overcurrent detection value I ovc varies and the variance thereof becomes ±Voff/Ron. The variance caused by the offset voltage Voff becomes a constant value obtained by dividing the offset voltage Voff by the on resistance Ron.
In the case where the amplifier AMP101 is formed as an IC, the variance range of the offset voltage (±Voff) of the amplifier AMP101 depends on the process of forming the IC. Supposing that Ron is 3 [mΩ], since the normal IC has the variance range of about ±10 [mv], an interruption current value varies in a range of ±3.3 [A].